Hah. Yeah. Nothing like one bad transistor causing failure of all but 2 of the SATA ports in a chip-set in a substantial number of chip-sets... (They claimed 5%. Their immediate response says to me it would likely be more...)
Better yet when it was a transistor that was a legacy leftover and could have simply been left out. Oh yes. And the flaw? It's only in the B2 stepping that was the final release of the chips. It did not exist in the test-stepping of the chip-set. Yes. That's right. The PREVIEW chips, didn't have the issue.
THAT said. The Sandy Bridge Core i5/i7m's are INCREDIBLE. So. XD